{"schema_version":"1.7.2","id":"OESA-2021-1350","modified":"2021-09-30T11:03:12Z","published":"2021-09-30T11:03:12Z","upstream":["CVE-2020-24511","CVE-2020-24512"],"summary":"microcode_ctl security update","details":"This is a tool to transform and deploy microcode update for x86 CPUs.\r\n\r\nSecurity Fix(es):\r\n\r\nImproper isolation of shared resources in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.(CVE-2020-24511)\r\n\r\nObservable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.(CVE-2020-24512)","affected":[{"package":{"ecosystem":"openEuler:20.03-LTS-SP1","name":"microcode_ctl","purl":"pkg:rpm/openEuler/microcode_ctl\u0026distro=openEuler-20.03-LTS-SP1"},"ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"2.1-33.oe1"}]}],"ecosystem_specific":{"src":["microcode_ctl-2.1-33.oe1.src.rpm"],"x86_64":["microcode_ctl-2.1-33.oe1.x86_64.rpm"]}},{"package":{"ecosystem":"openEuler:20.03-LTS-SP2","name":"microcode_ctl","purl":"pkg:rpm/openEuler/microcode_ctl\u0026distro=openEuler-20.03-LTS-SP2"},"ranges":[{"type":"ECOSYSTEM","events":[{"introduced":"0"},{"fixed":"2.1-33.oe1"}]}],"ecosystem_specific":{"src":["microcode_ctl-2.1-33.oe1.src.rpm"],"x86_64":["microcode_ctl-2.1-33.oe1.x86_64.rpm"]}}],"references":[{"type":"ADVISORY","url":"https://www.openeuler.org/en/security/safety-bulletin/detail.html?id=openEuler-SA-2021-1350"},{"type":"ADVISORY","url":"https://nvd.nist.gov/vuln/detail/CVE-2020-24511"},{"type":"ADVISORY","url":"https://nvd.nist.gov/vuln/detail/CVE-2020-24512"}],"database_specific":{"severity":"Medium"}}